Hybrid Pass Transistor Logic With Ambipolar Transistors

In comparison to the conventional complementary pull-up and pull-down logic structure, pass transistor (PTL) family reduces number of transistors required perform functions, thereby reducing both area power consumption. However, this requires inter-stage inverters ensure signal integrity in cascaded circuits, must be used provide each logical input its form. These signals increase device count significantly degrade overall system efficiency. Dual-gate ambipolar field-effect natively a single-transistor XNOR operation permit highly-efficient compact circuits due their capabilities. Similar PTL, based on require signals. Therefore, numerous are required, with significant energy costs. Ambipolar natural match for as hybrid ambipolar-PTL can simultaneously use these satisfy necessity PTL circuits. We therefore propose new that exploits capabilities transistors. Novel were designed simulated SPICE, demonstrating strong along efficiency advantages using requirements CMOS our full adder circuit reduce propagation delay by 47%, consumption 88%, energy-delay product factor 9, area-energy-delay 20.